𝑻𝒓𝒂𝒑 π‘Ίπ’šπ’”π’•π’†π’Ž π’Šπ’ 𝑨𝑼𝑹𝑰𝑿 𝑻π‘ͺπŸ‘πŸ•πŸ“π‘³π‘²

The AURIX TC375LK architecture (Tricore TC162P) system experiences traps from events like Non-Maskable Interrupts, instruction exceptions, etc. These traps cannot be disabled by software. There are eight trap classes distinguished as synchronous or asynchronous, hardware or software. This ensures reliable and secure real-time operations. When a trap occurs, specific actions are taken to handle it effectively.

Read More 𝑻𝒓𝒂𝒑 π‘Ίπ’šπ’”π’•π’†π’Ž π’Šπ’ 𝑨𝑼𝑹𝑰𝑿 𝑻π‘ͺπŸ‘πŸ•πŸ“π‘³π‘²

π‘Ίπ’π’‡π’•π’˜π’‚π’“π’† 𝑢𝒗𝒆𝒓 𝑻𝒉𝒆 π‘¨π’Šπ’“ (𝑺𝑢𝑻𝑨)Β 

Summary:
Software Over-The-Air (SOTA) allows remote updates for AURIX TC3xx microcontrollers, with dual PFLASH banks ensuring secure and reliable updates. The active and inactive banks are mapped for CPU execution, and address mapping is switched without data copying during updates. Configuration parameters are set in the User Configuration Block. The hardware settings update during System Reset.

Read More π‘Ίπ’π’‡π’•π’˜π’‚π’“π’† 𝑢𝒗𝒆𝒓 𝑻𝒉𝒆 π‘¨π’Šπ’“ (𝑺𝑢𝑻𝑨)Β 

Aurix TC375 GPIO’s

GPIO, or General Purpose Input/Output, pins on microcontrollers offer flexibility for various functions. They can be used for digital communication protocols and event-driven tasks. Additionally, they can serve alternate functions and have an emergency stop feature for individual output disconnection. Each 32-bit wide port input/output control register controls four GPIO port lines, providing detailed control.

Read More Aurix TC375 GPIO’s