Data Hazard Stalls in Cache Memory

In the realm of computer architecture, particularly in the context of embedded systems, data hazard stalls are a critical challenge that can significantly impact the performance and efficiency of a system. This write up aims to dissect the concept of data hazard stalls, particularly in cache memory, using RISC-V assembly code examples to illustrate the […]

Pipelining in Cache Memory

𝗣𝗶𝗽𝗲𝗹𝗶𝗻𝗶𝗻𝗴 𝗶𝗻 the context of 𝗰𝗮𝗰𝗵𝗲 𝗺𝗲𝗺𝗼𝗿𝘆 is a critical concept in modern computing architectures, playing a pivotal role in enhancing the performance and efficiency of systems. It refers to the process of arranging the execution of commands in a way that overlaps different stages of instruction execution. This technique, when applied to cache memory, involves […]

Cache Replacement Policies

At the heart of every high-performing embedded system lies a well-oiled cache memory mechanism, silently dictating the efficiency and responsiveness of the technology we rely on daily. Cache replacement policies, often overlooked, are the unsung heroes in this scenario, subtly but significantly influencing system performance. From wearables to aerospace, these policies are the architects of […]

Interrupt Latency: The Sleeping Dragon of Embedded Systems

Interrupt latency in embedded systems is the time from when an interrupt occurs to when the corresponding ISR executes. High latency can jeopardize real-time functionality in critical applications like airbag deployment. Factors affecting latency include priority levels, CPU cycles, and context switching. Optimizing ISRs and utilizing low-latency processors can mitigate this issue.

WHAT THE FU*K

The Fast Inverse Square Root line of code, ‘i = 0x5f3759df – (i >> 1);’, revolutionized graphics processing in the 90s by efficiently calculating 1/sqrt(x) through bit manipulation and approximation. It exemplified creative programming, significantly enhancing game performance and remains a celebrated part of programming lore and hacker culture.

What is Context Switching

The article explains context switching and details the roles of the scheduler and kernel during the process. It highlights how efficient context switching is crucial for multitasking in operating systems, allowing multiple processes to share system resources seamlessly. For further insights, the article is available in PDF format.

𝑪𝒂𝒄𝒉𝒆 𝑾𝒓𝒊𝒕𝒆 𝑻𝒉𝒓𝒐𝒖𝒈𝒉 𝒂𝒏𝒅 𝑪𝒂𝒄𝒉𝒆 𝑾𝒓𝒊𝒕𝒆 𝑩𝒂𝒄𝒌

Modern computing relies on the efficient interaction of components, particularly involving cache memory. This article explores the Write-Through and Write-Back strategies, detailing their operations, benefits, and drawbacks. Understanding these mechanisms enhances knowledge of the performance dynamics that underpin today’s digital environments.

Cache Read and Cache Write

A Short write-up on Cache Read and Cache Write LinkedIn Post: https://www.linkedin.com/posts/t-yashwanth-naidu_write-up-on-cache-read-and-cache-write-activity-7124733075783122944-O9sC?utm_source=share&utm_medium=member_desktop&rcm=ACoAACV39CcB7Pk0N7IuUB-8O0soOPWzMuYlnv8 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~An Article by: Yashwanth Naidu Tikkisetty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Ellipsis and Variadic

In C, when a function is called, the arguments are typically placed onto the stack, a region of memory. The function retrieves these arguments from the stack based on the function’s known parameter list. But when the number of arguments is variable, the function needs a way to access these “extra” arguments from the stack. […]

𝑨 𝒅𝒆𝒕𝒂𝒊𝒍𝒆𝒅 𝒍𝒊𝒔𝒕 𝒐𝒇 𝑶𝑩𝑱𝑫𝑼𝑴𝑷 𝒄𝒐𝒎𝒎𝒂𝒏𝒅 𝒐𝒑𝒕𝒊𝒐𝒏𝒔

𝒐𝒃𝒋𝒅𝒖𝒎𝒑 is a command-line program that is part of the GNU Binutils suite of tools. It’s used primarily for displaying various information from object files, which are typically produced as intermediate files during the compilation of a program. objdump can show information from a wide range of object file formats, including ELF (Executable and Linkable […]