Data Hazard Stalls in Cache Memory

In the realm of computer architecture, particularly in the context of embedded systems, data hazard stalls are a critical challenge that can significantly impact the performance and efficiency of a system. This write up aims to dissect the concept of data hazard stalls, particularly in cache memory, using RISC-V assembly code examples to illustrate the […]

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Pipelining in Cache Memory

𝗣𝗶𝗽𝗲𝗹𝗶𝗻𝗶𝗻𝗴 𝗶𝗻 the context of 𝗰𝗮𝗰𝗵𝗲 𝗺𝗲𝗺𝗼𝗿𝘆 is a critical concept in modern computing architectures, playing a pivotal role in enhancing the performance and efficiency of systems. It refers to the process of arranging the execution of commands in a way that overlaps different stages of instruction execution. This technique, when applied to cache memory, involves […]

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What Are Registers?

Registers are essential components in computer architecture that hold data for quick access. Yashwanth Naidu Tikkisetty explores their significance in a concise and informative manner. Read the full article for a comprehensive understanding.

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Peeking Into The Assembly

Assembly is tough. How does the processing of c code takes place in assembly? What are the kinds of instructions that we could see? What is actually happening in this gigantic mesh of lines? This is my small step to look into the assembly code of a small program/ replicating a small segment of code […]

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