Tag: computer architecture

𝑾𝒉𝒂𝒕 π’Šπ’” 𝒂 π‘Ίπ’π’π’π’‘π’Šπ’π’ˆ 𝒄𝒂𝒄𝒉𝒆 𝒄𝒐𝒉𝒆𝒓𝒆𝒏𝒄𝒆 𝒑𝒓𝒐𝒕𝒐𝒄𝒐𝒍?

As the demand for high-performance and energy-efficient computation rises, multiprocessor architectures like MPSoCs are increasingly used in embedded systems. Snooping Cache Coherence protocol ensures data consistency and real-time response for shared memory locations. It involves broadcasted transactions and different cache line states. There are two primary protocols: Write-Invalidate and Write-Update (or Write-Broadcast).

Read More 𝑾𝒉𝒂𝒕 π’Šπ’” 𝒂 π‘Ίπ’π’π’π’‘π’Šπ’π’ˆ 𝒄𝒂𝒄𝒉𝒆 𝒄𝒐𝒉𝒆𝒓𝒆𝒏𝒄𝒆 𝒑𝒓𝒐𝒕𝒐𝒄𝒐𝒍?

~~~ 𝑾𝒉𝒂𝒕 π’Šπ’” π‘«π’Šπ’—π’Šπ’”π’Šπ’ƒπ’π’† 𝑳𝒐𝒂𝒅 π‘Ίπ’„π’‰π’†π’…π’–π’π’Šπ’π’ˆ? ~~~

Divisible Load Scheduling (DLS) is a method for efficiently distributing computational work across processors or nodes. It involves considering factors like processing power and communication time. This ensures simultaneous task completion, making it useful for real-time systems, multi-core processors, distributed embedded systems, and load balancing in sensor networks.

Read More ~~~ 𝑾𝒉𝒂𝒕 π’Šπ’” π‘«π’Šπ’—π’Šπ’”π’Šπ’ƒπ’π’† 𝑳𝒐𝒂𝒅 π‘Ίπ’„π’‰π’†π’…π’–π’π’Šπ’π’ˆ? ~~~

Grain size

Optimizing program performance in parallel computing relies on the critical division and scheduling of tasks. Grain size, representing the size of basic program segments, impacts task distribution and efficiency. Fine-grained tasks are best for minimal dependencies, medium-grained strikes a balance, and coarse-grained is suitable for substantial independent work, each affecting load balancing and communication overhead.

Read More Grain size

𝑩𝒆𝒍𝒍’𝒔 π‘»π’‚π’™π’π’π’π’Žπ’š 𝒇𝒐𝒓 𝑴𝑰𝑴𝑫 π‘¨π’“π’„π’‰π’Šπ’•π’†π’„π’•π’–π’“π’†

Bell’s Taxonomy categorizes computer architecture based on memory hierarchy. In the MIMD(Multiple Instruction, Multiple Data) architecture, MultiComputer and MultiProcessor are key classifications. MultiComputer has separate processors and local memories for each computer, using message passing for inter-processor communication. MultiProcessor has a shared global memory accessible to all processors.Various types of multicomputer and multiprocessor architectures are discussed, including distributed multicomputers with geographically dispersed nodes, central multicomputers with shared memory, distributed multiprocessors with explicit message passing, and central multiprocessors with shared global memory.

Read More 𝑩𝒆𝒍𝒍’𝒔 π‘»π’‚π’™π’π’π’π’Žπ’š 𝒇𝒐𝒓 𝑴𝑰𝑴𝑫 π‘¨π’“π’„π’‰π’Šπ’•π’†π’„π’•π’–π’“π’†

𝑾𝒉𝒂𝒕 π’Šπ’” 𝑽𝒐𝒏 π‘΅π’†π’–π’Žπ’‚π’π’ π‘©π’π’•π’•π’π’†π’π’†π’„π’Œ?

The Von Neumann architecture stores data and instructions in the same memory, but it faces the Von Neumann Bottleneck due to a single bus for CPU-memory connection. This results in sequential data fetching, causing slower processing. To mitigate this, techniques like caching, pipelining, and parallel processing can be used to improve efficiency and performance.

Read More 𝑾𝒉𝒂𝒕 π’Šπ’” 𝑽𝒐𝒏 π‘΅π’†π’–π’Žπ’‚π’π’ π‘©π’π’•π’•π’π’†π’π’†π’„π’Œ?