Cache Read and Cache Write

A Short write-up on Cache Read and Cache Write LinkedIn Post: https://www.linkedin.com/posts/t-yashwanth-naidu_write-up-on-cache-read-and-cache-write-activity-7124733075783122944-O9sC?utm_source=share&utm_medium=member_desktop&rcm=ACoAACV39CcB7Pk0N7IuUB-8O0soOPWzMuYlnv8 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~An Article by: Yashwanth Naidu Tikkisetty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Ellipsis and Variadic

In C, when a function is called, the arguments are typically placed onto the stack, a region of memory. The function retrieves these arguments from the stack based on the function’s known parameter list. But when the number of arguments is variable, the function needs a way to access these “extra” arguments from the stack. […]

𝑨 𝒅𝒆𝒕𝒂𝒊𝒍𝒆𝒅 𝒍𝒊𝒔𝒕 𝒐𝒇 𝑶𝑩𝑱𝑫𝑼𝑴𝑷 𝒄𝒐𝒎𝒎𝒂𝒏𝒅 𝒐𝒑𝒕𝒊𝒐𝒏𝒔

𝒐𝒃𝒋𝒅𝒖𝒎𝒑 is a command-line program that is part of the GNU Binutils suite of tools. It’s used primarily for displaying various information from object files, which are typically produced as intermediate files during the compilation of a program. objdump can show information from a wide range of object file formats, including ELF (Executable and Linkable […]

𝑴𝒆𝒎𝒐𝒓𝒚 𝑨𝒍𝒍𝒐𝒄𝒂𝒕𝒐𝒓𝒔 𝑷𝒂𝒓𝒕 – 𝟐

Memory allocation is like fitting puzzle pieces together in the world of computer programming. Every time a programmer uses commands like malloc or calloc, there’s a lot going on behind the scenes. It’s more than just asking for memory; it’s about making sure everything fits just right and works efficiently with the computer’s hardware. Consider […]

What Are Registers?

Registers are essential components in computer architecture that hold data for quick access. Yashwanth Naidu Tikkisetty explores their significance in a concise and informative manner. Read the full article for a comprehensive understanding.

What is CACHE?

In computing, “cache” is a vital component that enhances processor speed and efficiency by storing frequently used data and program instructions. It leverages the principles of temporal and spatial locality to optimize data access. Caching offers benefits such as speed, reduced latency, and improved efficiency but comes with considerations like size, complexity, and cost.

L1 | L2 | L3

The L1, L2, and L3 caches in modern computing architectures bridge the speed gap between the CPU and RAM. L1 is integrated into the processor core for minimal latency, L2 is close to the CPU, and L3 serves multiple cores. They store instructions and data for immediate processing, with varying sizes and access times. Cache management includes algorithms for evicting entries and handling writes, while cache coherency ensures consistent memory across cores. The cache can handle write operations in different ways.

SRAM | DRAM

In the field of computing and embedded systems, SRAM and DRAM serve as crucial types of RAM with distinct differences. SRAM, using flip-flops, enables static data storage and finds use in CPU cache memory. On the contrary, DRAM employs capacitors and transistors for dynamic data storage and is preferred for main system memory. SRAM outpaces DRAM in speed, but DRAM excels in cost-effectiveness and reliability. For more details, please visit the LinkedIn post provided.

~ 𝐁𝐢𝐭 𝐁𝐚𝐧𝐠𝐢𝐧𝐠 ~

Bit banging is a technique to interface with external devices using standard input/output operations. It involves manually manipulating I/O pins to generate signals, such as for SPI communication when hardware modules are not available. This software-based approach provides direct control over the interface, avoiding the need for specialized hardware. [Original content shortened for length]

~ 𝐁𝐈𝐓 𝐁𝐀𝐍𝐃𝐈𝐍𝐆 ~

Bit-banding in ARM Cortex-M architectures simplifies the manipulation of individual bits within memory or peripheral registers, addressing complexities and inefficiencies. By providing direct access to specific bits through the alias region, it ensures atomicity and efficiency, avoiding the risk of data corruption. This feature significantly streamlines embedded systems development and enhances reliability.